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Title: IDDQ Outlier Screening through Two-Phase Approach: Clustering-Based Filtering and Estimation-Based Current-Threshold Determination
Authors: SHINTANI, Michihiro
SATO, Takashi  kyouindb  KAKEN_id
Author's alias: 佐藤, 高史
Keywords: IDDQ testing
k-means clustering
statistical leakage current analysis
Bayes' theorem
simulated annealing
Issue Date: 1-Aug-2014
Publisher: IEICE(電子情報通信学会)
Journal title: IEICE Transactions on Information and Systems
Volume: E97.D
Issue: 8
Start page: 2095
End page: 2104
Abstract: We propose a novel IDDQ outlier screening flow through a two-phase approach: a clustering-based filtering and an estimation-based current-threshold determination. In the proposed flow, a clustering technique first filters out chips that have high IDDQ current. Then, in the current-threshold determination phase, device-parameters of the unfiltered chips are estimated based on measured IDDQ currents through Bayesian inference. The estimated device-parameters will further be used to determine a statistical leakage current distribution for each test pattern and to calculate a and suitable current-threshold. Numerical experiments using a virtual wafer show that our proposed technique is 14 times more accurate than the neighbor nearest residual (NNR) method and can achieve 80% of the test escape in the case of small leakage faults whose ratios of leakage fault sizes to the nominal IDDQ current are above 40%.
Rights: © 2014 IEICE
DOI(Published Version): 10.1587/transinf.E97.D.2095
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