First-order SPICE modeling of SiC p- and n-channel side-gate JFETs toward high-temperature complementary JFET ICs

Abstract

A device model of silicon carbide (SiC) p- and n-channel junction field-effect transistors (JFETs) applicable in a high-temperature range was constructed, and the validity of the model was evaluated in Simulation Program with Integrated Circuit Emphasis (SPICE) simulations. The constructed device model well reproduced the electrical characteristics of the JFETs fabricated in our previous study over a wide temperature range from room temperature to 573 K. Furthermore, the static and dynamic characteristics of a SiC complementary JFET inverter were simulated with the constructed device model, and the temperature dependence of the logic threshold voltage showed good agreement, where the differences between the measurements and calculations were as small as 0.05 V.