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| 書誌情報 | ファイル |
|---|---|
| IDDQ Outlier Screening through Two-Phase Approach: Clustering-Based Filtering and Estimation-Based Current-Threshold Determination SHINTANI, Michihiro; SATO, Takashi (2014-08-01) IEICE Transactions on Information and Systems, E97.D(8): 2095-2104 |  |
| Hypersphere Sampling for Accelerating High-Dimension and Low-Failure Probability Circuit-Yield Analysis HAGIWARA, Shiho; DATE, Takanori; MASU, Kazuya; SATO, Takashi (2014-04-01) IEICE Transactions on Electronics, E97.C(4): 280-288 | |
| An Error Correction Scheme through Time Redundancy for Enhancing Persistent Soft-Error Tolerance of CGRAs IMAGAWA, Takashi; HIROMOTO, Masayuki; OCHI, Hiroyuki; SATO, Takashi (2015-07) IEICE Transactions on Electronics, E98.C(7): 741-750 | |
| Automation of Model Parameter Estimation for Random Telegraph Noise SHIMIZU, Hirofumi; AWANO, Hiromitsu; HIROMOTO, Masayuki; SATO, Takashi (2014-12-01) IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, E97.A(12): 2383-2392 | |
| Parallel Acceleration Scheme for Monte Carlo Based SSTA Using Generalized STA Processing Element YUASA, Hiroshi; TSUTSUI, Hiroshi; OCHI, Hiroyuki; SATO, Takashi (2013-04) IEICE Transactions on Electronics, E96.C(4): 473-481 | |
| A Cost-Effective Selective TMR for Coarse-Grained Reconfigurable Architectures Based on DFG-Level Vulnerability Analysis IMAGAWA, Takashi; TSUTSUI, Hiroshi; OCHI, Hiroyuki; SATO, Takashi (2013-04) IEICE Transactions on Electronics, E96.C(4): 454-462 | |
| Reliability Evaluation Environment for Exploring Design Space of Coarse-Grained Reconfigurable Architectures IMAGAWA, Takashi; HIROMOTO, Masayuki; OCHI, Hiroyuki; SATO, Takashi (2010-12) IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, E93-A(12): 2524-2532 | |
| Bayesian Estimation of Multi-Trap RTN Parameters Using Markov Chain Monte Carlo Method AWANO, Hiromitsu; TSUTSUI, Hiroshi; OCHI, Hiroyuki; SATO, Takashi (2012-12) IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, E95.A(12): 2272-2283 | |
| Power Distribution Network Optimization for Timing Improvement with Statistical Noise Model and Timing Analysis ENAMI, Takashi; SATO, Takashi; HASHIMOTO, Masanori (2012-12) IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, E95.A(12): 2261-2271 | |
| Linear Time Calculation of On-Chip Power Distribution Network Capacitance Considering State-Dependence HAGIWARA, Shiho; YAMANAGA, Koh; TAKAHASHI, Ryo; MASU, Kazuya; SATO, Takashi (2010-12) IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, E93-A(12): 2409-2416 | |