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dc.contributor.authorYiyu, Tanen
dc.contributor.authorInoguchi, Yasushien
dc.contributor.authorOtani, Makotoen
dc.contributor.authorIwaya, Yukioen
dc.contributor.authorTsuchiya, Takaoen
dc.contributor.alternative大谷, 真ja
dc.date.accessioned2018-08-23T04:34:54Z-
dc.date.available2018-08-23T04:34:54Z-
dc.date.issued2018-01-
dc.identifier.issn2076-3417-
dc.identifier.urihttp://hdl.handle.net/2433/233947-
dc.description.abstractReal-time sound field renderings are computationally intensive and memory-intensive. Traditional rendering systems based on computer simulations suffer from memory bandwidth and arithmetic units. The computation is time-consuming, and the sample rate of the output sound is low because of the long computation time at each time step. In this work, a processor with a hybrid architecture is proposed to speed up computation and improve the sample rate of the output sound, and an interface is developed for system scalability through simply cascading many chips to enlarge the simulated area. To render a three-minute Beethoven wave sound in a small shoe-box room with dimensions of 1.28 m × 1.28 m × 0.64 m, the field programming gate array (FPGA)-based prototype machine with the proposed architecture carries out the sound rendering at run-time while the software simulation with the OpenMP parallelization takes about 12.70 min on a personal computer (PC) with 32 GB random access memory (RAM) and an Intel i7-6800K six-core processor running at 3.4 GHz. The throughput in the software simulation is about 194 M grids/s while it is 51.2 G grids/s in the prototype machine even if the clock frequency of the prototype machine is much lower than that of the PC. The rendering processor with a processing element (PE) and interfaces consumes about 238, 515 gates after fabricated by the 0.18 µm processing technology from the ROHM semiconductor Co., Ltd. (Kyoto Japan), and the power consumption is about 143.8 mW.en
dc.format.mimetypeapplication/pdf-
dc.language.isoeng-
dc.publisherMDPI AGen
dc.rights© 2017 by the authors. Licensee MDPI, Basel, Switzerland. This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. (CC BY 4.0).en
dc.subjectsound field renderingen
dc.subjectFPGAen
dc.subjectFDTDen
dc.titleA Real-Time Sound Field Rendering Processoren
dc.typejournal article-
dc.type.niitypeJournal Article-
dc.identifier.jtitleApplied Sciencesen
dc.identifier.volume8-
dc.identifier.issue1-
dc.relation.doi10.3390/app8010035-
dc.textversionpublisher-
dc.identifier.artnum35-
dc.addressRIKEN Advanced Institute for Computational Science・Research Center for Advanced Computing Infrastructure, Japan Advanced Institute of Science & Technologyen
dc.addressResearch Center for Advanced Computing Infrastructure, Japan Advanced Institute of Science & Technologyen
dc.addressDepartment of Architecture and Architectural Engineering, Kyoto Universityen
dc.addressDepartment of Electrical Engineering and Information Technology, Tohoku Gakuin Universityen
dc.addressFaculty of Science and Engineering, Doshisha Universityen
dcterms.accessRightsopen access-
dc.identifier.eissn2076-3417-
出現コレクション:学術雑誌掲載論文等

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