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dc.contributor.author | Kotani, Daisuke | en |
dc.contributor.author | Okabe, Yasuo | en |
dc.contributor.alternative | 小谷, 大祐 | ja |
dc.contributor.alternative | 岡部, 寿男 | ja |
dc.contributor.transcription | コタニ, ダイスケ | ja |
dc.contributor.transcription | オカベ, ヤスオ | - |
dc.date.accessioned | 2016-04-18T03:04:52Z | - |
dc.date.available | 2016-04-18T03:04:52Z | - |
dc.date.issued | 2016-03 | - |
dc.identifier.issn | 0916-8532 | - |
dc.identifier.uri | http://hdl.handle.net/2433/210240 | - |
dc.description.abstract | Protecting control planes in networking hardware from high rate packets is a critical issue for networks under operation. One common approach for conventional networking hardware is to offload expensive functions onto hard-wired offload engines as ASICs. This approach is inadequate for OpenFlow networks because it restricts a certain amount of flexibility for network control that OpenFlow tries to provide. Therefore, we need a control plane protection mechanism in OpenFlow switches as a last resort, while preserving flexibility for network control. In this paper, we propose a mechanism to filter out Packet-In messages, which include packets handled by the control plane in OpenFlow networks, without dropping important ones for network control. Switches record values of packet header fields before sending Packet-In messages, and filter out packets that have the same values as the recorded ones. The controllers set the header fields in advance whose values must be recorded, and the header fields are selected based on controller design. We have implemented and evaluated the proposed mechanism on a prototype software switch, concluding that it dramatically reduces CPU loads on switches while passes important Packet-In messages for network control. | en |
dc.format.mimetype | application/pdf | - |
dc.language.iso | eng | - |
dc.publisher | Institute of Electronics, Information and Communications Engineers (IEICE) | en |
dc.rights | Copyright © 2016 The Institute of Electronics, Information and Communication Engineers | en |
dc.subject | Hardware and Architecture | en |
dc.subject | Electrical and Electronic Engineering | en |
dc.subject | Software | en |
dc.subject | Artificial Intelligence | en |
dc.subject | Computer Vision and Pattern Recognition | en |
dc.title | A Packet-In Message Filtering Mechanism for Protection of Control Plane in OpenFlow Switches | en |
dc.type | journal article | - |
dc.type.niitype | Journal Article | - |
dc.identifier.jtitle | IEICE Transactions on Information and Systems | en |
dc.identifier.volume | E99.D | - |
dc.identifier.issue | 3 | - |
dc.identifier.spage | 695 | - |
dc.identifier.epage | 707 | - |
dc.relation.doi | 10.1587/transinf.2015EDP7256 | - |
dc.textversion | publisher | - |
dc.address | 京都大学 大学院情報学研究科 知能情報学専攻メディア応用講座 ネットワークメディア分野 | en |
dc.address.alternative | Network Media Group Department of Intelligence Science and Technology, Graduate School of Informatics, Kyoto University | en |
dc.relation.url | https://search.ieice.org/ | - |
dcterms.accessRights | open access | - |
出現コレクション: | 学術雑誌掲載論文等 |
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