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DCフィールド | 値 | 言語 |
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dc.contributor.author | Fujita, Yutaka | en |
dc.contributor.author | Ishihara, Shoji | en |
dc.contributor.author | Nakashima, Yuki | en |
dc.contributor.author | Nishigaya, Kosuke | en |
dc.contributor.author | Tanabe, Katsuaki | en |
dc.contributor.alternative | 藤田, 裕 | ja |
dc.contributor.alternative | 石原, 翔治 | ja |
dc.contributor.alternative | 中島, 悠貴 | ja |
dc.contributor.alternative | 西ヶ谷, 紘佑 | ja |
dc.contributor.alternative | 田辺, 克明 | ja |
dc.date.accessioned | 2022-09-22T05:19:29Z | - |
dc.date.available | 2022-09-22T05:19:29Z | - |
dc.date.issued | 2021-03 | - |
dc.identifier.uri | http://hdl.handle.net/2433/276339 | - |
dc.description.abstract | Fluidic self-assembly is a versatile on-chip integration method. In this scheme, a large number of semiconductor microchips are spontaneously deposited onto a host chip. The host chip typically comprises a Si substrate with an array of pockets at the designated microchip placement sites. In this study, we installed an SiO₂ layer on the terrace region between the pockets of the host chip, to reduce the attraction with the Si microchips. By the SiO₂-topped terrace scheme, we demonstrated a significant enhancement in the deposition selectivity of the Si microchips to the pocket sites, relative to the case of the conventional Si-only host chip. We theoretically explained the deposition selectivity enhancement in terms of the van der Waals interaction. Furthermore, our quantitative analysis implicated a potential applicability of the commonly used interlayer dielectrics, such as HfO₂, silsesquioxanes, and allyl ethers, directly as the terrace component. | en |
dc.language.iso | eng | - |
dc.publisher | MDPI AG | en |
dc.rights | © 2021 by the authors. Licensee MDPI, Basel, Switzerland. | en |
dc.rights | This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license | en |
dc.rights.uri | http://creativecommons.org/licenses/by/4.0/ | - |
dc.subject | semiconductor | en |
dc.subject | silicon | en |
dc.subject | thin film | en |
dc.subject | layer transfer | en |
dc.subject | self-assembly | en |
dc.subject | integration | en |
dc.subject | device | en |
dc.subject | interface | en |
dc.subject | fluid | en |
dc.subject | liquid | en |
dc.title | Selective Transfer of Si Thin-Film Microchips by SiO₂ Terraces on Host Chips for Fluidic Self-Assembly | en |
dc.type | journal article | - |
dc.type.niitype | Journal Article | - |
dc.identifier.jtitle | Applied Mechanics | en |
dc.identifier.volume | 2 | - |
dc.identifier.issue | 1 | - |
dc.identifier.spage | 16 | - |
dc.identifier.epage | 24 | - |
dc.relation.doi | 10.3390/applmech2010002 | - |
dc.textversion | publisher | - |
dcterms.accessRights | open access | - |
datacite.awardNumber | 18H01475 | - |
datacite.awardNumber.uri | https://kaken.nii.ac.jp/ja/grant/KAKENHI-PROJECT-18H01475/ | - |
dc.identifier.eissn | 2673-3161 | - |
jpcoar.funderName | 日本学術振興会 | ja |
jpcoar.awardTitle | 超高効率太陽電池の実現に向けた単原子層材料を介する新規高性能半導体接合技術の創出 | ja |
出現コレクション: | 学術雑誌掲載論文等 |

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