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mfeku_29_4_420.pdf | 842.4 kB | Adobe PDF | 見る/開く |
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DCフィールド | 値 | 言語 |
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dc.contributor.author | UMOTO, Jūrō | en |
dc.contributor.author | YAMADA, Hisao | en |
dc.contributor.author | HAYASHI, Shigenori | en |
dc.date.accessioned | 2023-03-28T09:06:11Z | - |
dc.date.available | 2023-03-28T09:06:11Z | - |
dc.date.issued | 1967-11-24 | - |
dc.identifier.uri | http://hdl.handle.net/2433/280705 | - |
dc.description.abstract | In this paper, the authors introduce three kinds of time delay devices, which they have planned and developed extending over about the last ten years, to be applied to the low-speed surge analysers to analyse the surge performances on the transmission and distribution systems, which are composed of the time delay device and the low-speed electronic analog computer and can do away with the unavoidable defects of the conventional surge analysers. In addition, the authors simply illustrate the working principles of their surge analyser with examples of the single-conductor systems. | en |
dc.language.iso | eng | - |
dc.publisher | Faculty of Engineering, Kyoto University | en |
dc.publisher.alternative | 京都大学工学部 | ja |
dc.subject.ndc | 500 | - |
dc.title | Time Delay Devices for Low-Speed Electronic Surge Analyser | en |
dc.type | departmental bulletin paper | - |
dc.type.niitype | Departmental Bulletin Paper | - |
dc.identifier.ncid | AA00732503 | - |
dc.identifier.jtitle | Memoirs of the Faculty of Engineering, Kyoto University | en |
dc.identifier.volume | 29 | - |
dc.identifier.issue | 4 | - |
dc.identifier.spage | 420 | - |
dc.identifier.epage | 431 | - |
dc.textversion | publisher | - |
dc.sortkey | 04 | - |
dc.address | Department of Electrical Engineering | en |
dc.address | Department of Electrical Engineering, II | en |
dc.address | Doshisha University | en |
dcterms.accessRights | open access | - |
dc.identifier.pissn | 0023-6063 | - |
出現コレクション: | Vol.29 Part 4 |

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